A New Design Methodology Based on System-Level Interconnect Prediction

In current deep sub-micron chip design, interconnect effects start to dominate the chip’s performance. Therefore, the design flow has to become more interconnect-oriented. To limit the number of design iterations (and hence improve the time-to-market) one has to estimate interconnect parameters and their impact as early as possible. This is the goal of the field of System-Level Interconnect Prediction. New research results are becoming available and the last couple of years have brought both more interest and more progress in the field than in the thirty years before. This paper is an introduction to the field and provides an overview of some of the recent advances in system-level interconnect prediction, including several applications.